JTAG/Boundary Scan integration in In-Circuit-Test

日期:2021-08-18 23:30
瀏覽次數:1595
摘要:

JTAG/Boundary Scan integration in In-Circuit-Test (ICT) systems

In-Circuit-Test (ICT) is the most widespread technology at present because the principle allows all electrically detectable faults to be found. But its capability is becoming limited by access difficulties since components have become smaller, and because of more complex narrow width nets and multi-layer boards.

Boundary Scan does not have access limitations. A combination is beneficial whenever mechanical access is difficult even though there may be a small number of Boundary Scan components on the PCB.

Advantages:

  • Very fast total system
  • Very high fault coverage also for highly compact PCBs
  • Reduction of nail bed adapter costs
  • Simple test program generation because each test technology is applied according to its core competence

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